From SoC to Middleware to Platforms
DLIN, Local Interconnect Network IP Core [not only] for automotive
From SoC to Middleware to Platforms
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Feb. 01, 2013 – The DLIN is the newest Local Interconnect Network IP Core developed by Digital Core Design. Our solution is fully compatible with the LIN 1.3, 2.1 and the newest version 2.2 Revision A, released by the LIN Consortium. The core is described at RTL level, empowering the target use in both, FPGA and ASIC technologies.
The DLIN, DCD's IP Core for Local Interconnect Network, is an ideal solution most of all for automotive designs. As technologies and facilities implemented in a car grow every year, the need for a cheap serial network has arisen. That's why LIN seems to be the most suitable solution to integrate intelligent sensor devices or actuators in today's cars. Contrary to the CAN, it enables cost competitive serial communication, building the same an extended vehicle's electrical network, which will be used as CAN's sub-network. - Our DLIN controller supports transmission speed between 1 and 20kb/s - says Jacek Hanke, CEO in Digital Core Design - that allows to transmit and receive LIN messages compatible to LIN 1.3, LIN 2.1 and also the newest LIN 2.2 rev A.
Compared to the CAN, LIN is slower, but thanks to its simplicity, it is much more cost effective. That's why the DLIN is ideal for communication in intelligent sensors and actuators, where the bandwidth and versatility of CAN is not required. DCD's IP Core provides an interface between a microprocessor/microcontroller and a LIN bus. It can work as a master or as a slave LIN node, depending on a working mode determined by the microprocessor/microcontroller. The reported information status includes the type and condition of transfer operations being performed by the DLIN, as well as a wide range of LIN error conditions (overrun, framing, parity, timeout). DCD's IP Core includes also a programmable timer, which allows to detect timeout and synchronization error. The Core is described at RTL level, empowering the target use in FPGA and ASIC technologies.
About Digital Core Design
Digital Core Design a privately held company founded in 1999 is one of the leading and most successive IP companies. The company provides VHDL and Verilog high quality, low cost synthesizable IP cores for devices such as microcontrollers, bus interfaces, arithmetic coprocessors and other arithmetic components. Our expertise is to combine customers application know-how with our design methodology, IP-Cores and System-on-Chip knowledge. DCD s customers benefit from our time-to-market and product oriented design approach that enables unique embedded system solutions.
Designed from the ground up to meet SOC requirements, DCD s products offer:
- An industry-leading combination of high performance, low power, and small die size
- Easy system integration - to peripherals, coprocessors, and memories
- Easy customization for adaptability to a wide range of applications
- A choice of robust third party development and software tools
- An ASIC-style implementation methodology that leverages commercially available design tools
Specializing in modifications of existing popular microcontrollers and microprocessors, Digital Core Design offers a new improved microcontroller architectures - 100% software compatible with their predecessors. The processors can be integrated with a broad range of available peripherals, including: USB, MAC, Timers, UARTS, I2C interface, SPI interface, Compare/Capture, Watchdog Timer and fixed/floating point coprocessors.
The other company specialization is developing of unique Fixed and Floating Point arithmetic coprocessors, and IEEE 754 compliant pipelined floating point units which allow an extremely fast floating point computation.
The Cores are improved and their quality is kept at the highest level, because DCD cooperates very closely with the leading Semiconductor Manufactures, EDA Vendors and Industry Affiliations: ALTERA, XILINX, LATTICE, ACTEL, Synopsys and Design-Reuse.