Attopsemi Published I-fuse™ Technology with the Smallest Size, Lowest Power, and Full Testability on 22nm FD-SOI at IEEE S3S Conference, 2018.

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Santa Clara, California, Oct. 23, 2018 – 

Attopsemi Technology, a revolutionary fuse-based OTP provider, published a paper at IEEE S3S conference on October 16th, 2018 titled "A 0.0487mm2 4Kx8 Metal-Gate Innovative Fuse Memory at 22nm FD-SOI with 1.2V+/-16% Program Voltage, 0.42V VDDmin, and Full Testability" attracted lots of attentions from the audience.

"Comparing with other OTP IPs in comparable nodes, our I-fuse™ OTP had a fraction of IP size, programming voltage, and programming current," said Shine Chung, Chairman of Attopsemi. "We had small IP size because we don't need charge pumps different from anti-fuse OTP. We had low program voltage and current because we program our I-fuse™ below a catastrophe breaking point different from eFuse OTP," stated by Shine Chung.

"OTP (one-time programmable non-volatile memory) has a fundamental problem. Since all bits are read "0" before programming, OTP cannot be fully testable," said Shine Chung. "Before programming, you never know whether OTP can read "1", the bitlines/wordlines are open or shorted, or the cells can be programmable." "However, we cannot use this OTP anymore if we did program on OTP cell experimentally. Here comes the dilemma" adds Shine.

"We can solve this situation by using three advantages of I-fuse™ technology. First of all, I-fuse™ programming mechanism is based on heat accelerated electro-migration. If we screen the initial I-fuse™ resistance which is below 400 ohm, for instance, we can definitely generate enough heat to program I-fuse™ cell," said Shine Chung. "Second, the programming yield loss of I-fuse™ is almost zero due to its "true" electro-migration and un-ruptured programming mechanism other than conventional eFuse and anti-fuse," said Shine Chung. "As long as our customers program I-fuse™ by following our specs, the program yield can be guaranteed," said Shine Chung.

"Finally, to achieve ZERO defect strategy, all I-fuse™ cells and functional blocks, such as X/Y-decoders, sense amplifiers, control logic and etc. should be fully testable," said Shine Chung, "We developed a non-destructive programming scheme so that we can create fake reading "1" to fully exercise testing all peripheral circuits," stated by Shine Chung. For more information, please visit Attopsemi website http://www.attopsemi.com/

Founded in 2010, Attopsemi Technology is dedicated to developing and licensing fuse-based One-Time Programmable (OTP) IP to all CMOS process technologies from 0.7um to 7nm and beyond with various silicided polysilicon and HKMG technologies. Attopsemi provides the best possible OTP solutions for all merits in small size, high quality, high reliability, low power, high speed, wide temperature and high data security. Attopsemi's proprietary I-fuse™ OTP technologies have been proven in numerous CMOS technologies and in several silicon foundries.

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