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Customizing FPGA-based DisplayPort 1.4a designs

Jul. 25, 2018 – 

Bitec's DisplayPort intellectual property (IP) core has now been optimized for Microsemi's PolarFire field programmable gate arrays (FPGAs).

Compared to alternative solutions, the core gives designers the ability to take advantage of the PolarFire family's smaller size and 50 percent lower power to enable stunning image quality in small form-factor embedded displays and monitors. Supporting resolutions as high as 8K (7680x4320 pixel) ultra-high definition (UHD) video, the newly available IP supports up to four streams so multiple monitors can use a single DisplayPort connection, lowering system costs and speeding time to market. The IP supports from one, two and four data lanes with rates up to 8.1 Gbps, providing designers with a cost-effective, scalable industry standard for internal and external LCD panel connections. 
Bitec's core gives designers optional high-bandwidth digital content protection (HDCP) 1.3/2.2, supporting the latest standard for protecting digital media. Bitec offers a DisplayPort FPGA mezzanine card (FMC) which can be used with the PolarFire Evaluation Kit to accelerate development.

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