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Spectral releases Silicon proven High Speed Low Power SRAM compilers in the 40/45nm CMOS/RFSOI process nodes targeted for a wide range of IOT & 5G Applications


SOMERVILLE, N.J. -- June 26, 2018 -- Spectral Design & Test Inc. (SDT) today announced that their lead customers are integrating dozens of configurations of SRAM & Register File macros generated by Memory compilers developed in 40/45nm bulk CMOS & RFSOI nodes across multiple foundries.

Mobile applications like home automation to energy measurement devices require increased intelligence to make decisions resulting in a requirement for energy efficient microcontrollers that require low power, high density memories. SDT customers have done multiple tape outs and are ramping up production of their extreme low power IOT devices using SDT’s best in class differentiated low power, high speed memory macros.

Memory Compilers developed in the 45/40nm node support embedded & non-embedded flash processes. They use a combination of high density & high speed bit cells to generate RAM macros. Spectral software and methodology analyze bit cells for cell stability at extreme conditions including low voltage and aging effects. Low power retention modes are achieved by proprietary source biasing design technique finetuned across operational voltages. The Spectral-RAM architecture interprets the sequence of Read/Write patterns and makes appropriate adjustments to the self timed circuits to achieve extremely low dynamic power voltages. With appropriate levels of read & write assist, Spectral designs can seamlessly support dynamic voltage scaling without stressing devices. "High capacity, low power SRAMs are a challenge in low power 40nm process nodes because these present a unique challenge of designing with weak, highly variable bit cells at reduced supply voltages,” said Deepak Mehta, President & CEO of SDT. Aside from low power IOT applications, there is a rise in demand for 5G devices that can operate at very high speed. Many applications such as these are well suited to RFSOI process nodes. Using a combination of silicon proven architectures and a robust Memory Development Platform, we can generate Memory Designs with the highest Quality standards required by the most demanding customers.” Spectral will be demonstrating their Memory Development & Delivery Platform at the Design Automation Conference from June25-June28.

SRAM compiler IP Cores

For more information about Spectral’s Silicon Proven Memory IP, please reach out to us at sales@spectral-dt.com

Or check out our website at: www.spectral-dt.com

Spectral releases Silicon proven High Speed Low Power SRAM compilers in the 40/45nm CMOS/RFSOI process nodes targeted for a wide range of IOT & 5G Applications

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