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TSMC advanced packaging seen crucial for HPC chips

Taipei, Apr. 03, 2018 – 

The InFO WLP (integrated fan-out wafer level packaging) and CoWoS (chip on wafer on substrate) developed by Taiwan Semiconductor Manufacturing Company (TSMC) have emerged as two major advanced wafer-level packaging technologies badly needed in the AI (artificial intelligence) era, as their combination with advanced foundry process can provide a secure guarantee for the rollout of optimal HPC (high-performance computing) chips, according to industry sources.

This has enabled the foundry giant to capture sizeable orders from international tech giants including Apple, Nvidia and Google, the sources noted.

The sources said that global tech giants have been pursuing the upgrades of the computing power of HPC chips, and the advanced foundry and packaging processes provided by TSMC can serve their needs and turn numerous AI-based imaginations into realities.

Accordingly, with a clear-cut strategy of zeroing in on high-end markets and diamond-class clients, TSMC will not budge its determination to continue applying its wafer-level packaging processes in tandem with advanced foundry nodes. This is despite the fact that Samsung and global major OSAT (outsourced semiconductor assembly and test) players are actively developing an advanced FOPLP (fan-out panel level packaging) process that can package chips on a panel larger than 8-inch or 12-inch wafers to significantly reduce the packaging cost.

Gaining market acceptance

In fact, the CoWoS process needed to package high-performance AI chips for cloud datacenters is significantly gaining market acceptance, shrugging off the previous high-cost concerns. Likewise, the InFO WLP technology is also gaining popularity, as it is ideal for packaging processors of mobile devices. This is why TSMC has maintained high capacity utilization of its advanced packaging capacities, and is even mulling capacity expansion, industry sources indicated.

The sources continued that the FOPLP process developed by Samsung is likely to be first applied to packaging radio frequency ICs, before it can be used to package application processors of high-end smartphones, for which high-performance computing and high yield rates are usually major concerns.

Meanwhile, semiconductor equipment supply chains are eyeing great market potentials for advanced packaging equipment in the AI era, and they expect the competition in the advanced packaging field to heat up in 2020 amid the continuous progress of datacenters, next-generation vehicles, smartphone AI chips and 5G solutions.


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