The Biggest SoC/FPGAs

Find the Latest SoC Solutions
for... Automotive... IoT... Security... Audio... Video

Intel Ships Stratix 10 SX

eejournal, Nov. 07, 2017 – 

In the decades-long battle between Altera (now part of Intel) and Xilinx, no title has been more hotly contested than "Ours is Biggest." Way back in the days when real LUTs had 4 inputs, FPGA companies resorted to measuring their density with "system gates" in order to obscure the pathetically small (at the time) amount of logic that could actually be implemented in the programmable fabric of their chips. We got press releases like "Our Devices Pack Up To 4.5 Million System Gates of Logic" (meaning that you could probably build at least one highly inefficient 16×16 multiply/accumulate before you ran into utilization problems and place-and-route failures.)

Seemingly endless PR and marketing wars raged about whose LUTs packed more logic, whether a gate count multiplier was justified for a carry chain, and how many "system gates" should be counted for various non-LUT features. The elusive answer to all of this back-and-forth posing was, of course, "nobody cares," but the war of words did provide a source of comic relief not often found in the dry world of datasheets and device specifications. Shakespeare never wrote with such farcical irony.

Those days are far behind us now. Today, the market has matured, engineers are more discerning about their reasons for designing in particular silicon solutions, and FPGA companies have evolved to a more rational tone in marketing their technology. No longer are we bombarded with "5x lower power" (whatever THAT means), or "30% more logic capacity" than "competing FPGAs."

 Back