Montage Technology Licenses Arteris FlexNoC Interconnect IP for Set-Top Box (STB) Systems-on-Chip (SoCs)

Network-on-chip interconnect IP enables optimal DRAM efficiency and quality-of-service (QoS)

CAMPBELL, Calif., Aug. 04, 2015 – 

Arteris Inc., the inventor and only supplier of silicon-proven commercial network-on-chip (NoC) interconnect IP solutions, today announced that Montage Technology, maker of digital set-top box (STB) systems-on-chip, has licensed Arteris FlexNoC IP for use in its next generation chipsets.

Montage Technology chose Arteris FlexNoC primarily for the ability to easily arbitrate the flows of high bandwidth and low latency on-chip traffic competing for dynamic random access memory (DRAM) access in their chipsets. In particular, the combination of Arteris FlexNoC's QoS features with FlexNoC's FlexMem memory scheduler provided an extremely effective but easy-to-configure means to manage SoC quality of service.

"Our set-top box chipsets manage competing requirements for high bandwidth video streams and low latency on-chip communications. Arteris FlexNoC's quality-of-service and data traffic arbitration features are expected to be the best of any on-chip interconnect IP solution available," said CT Chen, VP of SoC Engineering of Montage Technology.

"Montage Technology's license of Arteris FlexNoC is validation of our interconnect QoS technology's ability to provide optimal system-wide performance and DRAM utlization," said K. Charles Janac, President and CEO of Arteris. "We look forward to working with the Montage team to help spread these benefits throughout their STB product lines."

About Arteris Inc

Arteris provides Network on Chip (NoC) interconnect IP to improve performance, power consumption and die size of system on chip (SoC) devices for consumer electronics, mobile, automotive and other applications.

Using Arteris solves pain for our customers. Traditional bus and crossbar interconnect approaches create serious problems for architects, digital and physical designers, and integrators: Massive numbers of wires, increased heat and power consumption, failed timing closure, spaghetti-like routing congestion leading to increased die area, and difficulty making changes for derivatives.

Whether you are using AXI, OCP, AHB or a proprietary protocol, Arteris Network on Chip (NoC) IP reduces the number of wires by nearly one half, resulting in fewer gates and a more compact chip floor plan. Having the option to configure each connection s width, and each transaction s dynamic priority, assures meeting latency and bandwidth requirements. And with the Arteris IP configuration tool suite, design and verification can be done easily, in a matter of days or even hours.

Arteris invented Network on Chip technology, offering the world s first commercial solution in 2006. Arteris connects the IP blocks in semiconductors from Qualcomm, Samsung, TI, and others, representing over 50 System on Chip devices. Find out more about Arteris products.

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