Synopsys Continues Innovation Momentum with Latest IC Compiler II Release

Samsung Deploys IC Compiler II for Physical Design Across Established and Emerging Nodes

MOUNTAIN VIEW, Calif., Jun. 08, 2015 – 

Synopsys, Inc. (Nasdaq: SNPS), today announced the immediate availability of the 2015.06 release of its IC Compiler™ II place and route solution. Launched last year, IC Compiler II, successor to the industry-leading IC Compiler place and route solution, has been steadily adding customers and is seeing unprecedented levels of design activity across all nodes. Today, with active usage across more than 30 customers, IC Compiler II is rapidly transforming the world of physical design with its game-changing productivity and superior quality of results (QoR). Samsung and Synopsys have partnered on IC Compiler II since the early days and have observed first-hand the game-changing benefits of up to 5X faster implementation through several successfully completed tapeouts. Having observed compelling turnaround time and QoR benefits with IC Compiler II, Samsung is actively deploying IC Compiler II for place and route and is rolling out the 15.06 release throughout Samsung. The 15.06 release offers cutting-edge capabilities such as the industry's only multi-level design planning for faster closure, advanced total power optimization and innovative context-aware clock tree synthesis techniques for an additional 10 percent reduction in total power and up to 5 percent smaller area. With the 2015.06 release of IC Compiler II, Synopsys continues to strengthen its "power of 10X" solution for widespread deployment across the physical design community.

IC Compiler II is Synopsys' next-generation place and route solution designed from the ground up to deliver the highest productivity and best QoR for designs across all process nodes. This full-featured, production-ready, netlist-to-GDSII implementation system is built on a brand new multi-threaded infrastructure. It offers ultra-high capacity design planning, unique new clock-building technology and patented global analytical optimization capabilities. These innovative technologies enable IC Compiler II to address today's hypersensitive time-to-market needs by delivering 5X faster runtime along with half the iterations required to achieve target performance, together providing a 10X boost in throughput. The leap forward in productivity realized with IC Compiler II is continuing to deliver transformational benefits to physical designers worldwide.

The 2015.06 release of IC Compiler II introduces several advanced technologies to enable additional QoR and throughput advantages for its growing customer base. Innovative capabilities like multi-level design planning enable seamless handling of complex multi- hierarchy design requirements, resulting in faster design closure. Techniques such as total power optimization and context-aware clock tree synthesis deliver smaller area and reduce total power, benefits that are critical to designing at emerging technology nodes. This latest release also includes advanced electro-migration (EM) optimization, native support for mesh and multi-source topologies, and technologies for 10-nm node readiness.

"It is rewarding to see top semiconductor companies such as Samsung actively deploying IC Compiler II for their physical design needs," said Antun Domic, executive vice president and general manager of the Design Group at Synopsys. "Our 2015.06 release marks yet another milestone for IC Compiler II which has seen an unprecedented level of adoption across more than 30 companies, with the list continuing to grow rapidly."

About Synopsys, Inc.

Synopsys, Inc. is the world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design and manufacturing. Synopsys comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan, Asia and India.

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