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Cadence Strengthens Allegro Technology Portfolio to Make Design Cycles Shorter and More Predictable
New Manufacturing Option streamlines handoff to manufacturing and speeds PCB documentation process by up to 60 percent
SAN JOSE, Calif., May. 20, 2015 –
Cadence Design Systems, Inc. (NASDAQ: CDNS), today unveiled the Allegro® 16.6 portfolio, which features several new products and technologies. Included in this release is the new Allegro PCB Designer Manufacturing Option, which can shorten the time to create manufacturing documentation by up to 60 percent, and several key technology updates catered to increase efficiency, control and productivity for designers, while streamlining handoff to manufacturing. Driven by increasing demands to provide a more predictable and shorter design cycle, the Allegro 16.6 portfolio includes more capabilities that accelerate routing and tuning for high-speed interfaces such as DDR3 and DDR4.
New Products
The Allegro 16.6 portfolio includes new products to help PCB designers achieve maximum efficiency and productivity, while keeping cost of ownership low. These new products include:
- Allegro PCB Designer Manufacturing Option, a comprehensive, powerful, easy-to-use toolset that makes it efficient and cost effective for PCB designers to streamline the development of a release-to-manufacturing package for their products. It includes the Design for Manufacturing (DFM) Checker, Documentation Editor and Panel Editor modules. The Documentation Editor module can speed up overall fabrication documentation by up to 60 percent.
- Allegro Rules Developer and Checker, which allows users to develop custom fabrication and assembly rules to extend capabilities provided by Allegro PCB Designer and the Manufacturing Option. This tool provides a relational geometric verification language designed specifically for creating rules that are proprietary and custom to an original equipment manufacturer (OEM). The rules can be viewed and executed from the Allegro Constraint Manager, making it a single source for all design rules checks (DRCs) within a PCB.
Key Technology Updates
The Allegro 16.6 technology portfolio update offers multiple capabilities that boost turnaround time by shortening design cycles, accelerating timing closure and providing more editing control. These capabilities include:
- Adding return path vias while routing differential pairs, ensuring a ground current return path for differential pair vias
- Updates to avoid coupling of high-speed signals to the FR-4 fabric weave, making it easy for designers to create off-angle routes based on user-defined parameters, accelerating the PCB layout process significantly
- Adjusting spacing for signals in interfaces such as DDR3 and DDR4, allowing users to compress signals in high-density route areas, and to spread signals to avoid crosstalk between signals or make space for tuning
- A new shape-editing AppMode, allowing users to create and modify complex shape geometries very easily and quickly for copper shapes, flex cover lay geometries and complex pad shapes
About Cadence Design Systems, Inc.
Cadence Design Systems is a leading global EDA company. Cadence customers use our software, hardware, and services to overcome a range of technical and economic hurdles.
Our technologies help customers create mobile devices with longer battery life. Designers of ICs for game consoles and other consumer electronics speed their products to market using our hardware simulators to run software on a virtual chip long before the actual chip exists. We bridge the traditional gap between chip designers and fabrication facilities, so that manufacturing challenges can be addressed early in the design stage. And our custom IC design platform enables designers to harmonize the divergent worlds of analog and digital design to create some of the most advanced mixed-signal system on chip (SoC) designs. These are just a few of the many essential Cadence solutions that drive the success of leading IC and electronic systems companies.